Intel has built a prototype chip with 80 cores that can exchange data at 1Tbyte per second.
The chip will have 80 floating-point cores, each running at 3.16GHz. To move data between the cores and into system memory, Intel plans to use an on-board interconnect fabric and static Ram chips attached to the bottom of the chips.
An Intel research paper on the tera-scale architecture noted that one of the biggest challenges may be the ability of programmers to write efficient code that could gain the benefits of multi-core processing. The development of parallel programs is traditionally a time-consuming and error-prone task that requires developers to think differently.
"Teaching mainstream and future developers to identify and then effectively exploit parallelism is something Intel must foster, if these skills are to move from a narrowdomain of high-performance computing experts into the mainstream for the compiler, and expose new interfaces to tools," the paper said.
Intel also said software libraries would need to provide new application programming interfaces to make it easier to develop robust and scalable applications.