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Although the first Itanium chip has been out for just over a year, it has been used mainly by developers and a few early adopters who wanted to become familiar with Intel's IA-64 architecture.
Itanium 2 is a more complete and faster implementation of this architecture.
Despite the improvements, the latest Itanium chip may only catch on slowly because of its newness and the software designed for it.
The hardware will be approached cautiously by companies which will want to test before they implement.
Similarly, the software - operating systems and applications - will also be in their first generation and will need to be bedded in to ensure no significant bugs are present.
In fact, key software is only just appearing and Microsoft's full 64-bit operating system, Windows .net, and popular database applications, primarily Oracle's 9i and Microsoft's SQL Server, are still being beta-tested.
Even if Itanium is slow to take off, Intel will continue with its plan to supercede the existing 64-bit chips based on Risc (reduced instruction set computer), the internal code the processor uses to execute programs.
Intel was never a fan of the Risc specification, adopted by chip makers such as Mips and Sparc, and decided to create its own instruction set - explicitly parallel instruction computing (Epic) - for its vision of the 64-bit world.
As the acronym implies, Epic allows the chip to execute code internally in parallel, analogous to the way multiprocessor systems use threads to execute code.
This means, for example, that steps in a testing loop, which are normally executed sequentially can be executed in parallel to speed up the process considerably. This parallelism has been exploited in other program execution processes and is responsible, in conjunction with the ability to handle 64-bit addressing and calculations, for much of the chip's speed.
Another speed improvement has been gained by accelerating the front-side bus, the path that is used to transfer information between the processor and other system components.
Originally this bus ran at 266MHz but on Itanium 2 it rattles along at 400MHz. It is also twice as wide at 128-bits which potentially doubles the new throughput speed.
Itanium 2 will be judged on its results doing real work but initial benchmarks show that it may do well.
Hewlett-Packard, the co-developer of Itanium, was the first to announce availability of Itanium 2 servers and workstations, and it released a number of Transaction Processing Council benchmark results that outpace any performance figures achieved to date.