Texas Instruments claims to have proved that the
material it will use as the gate dielectric in its future
transistors is both thermally and electrically stable.
Last year, the company said it would use hafnium silicon
oxynitride (HfSiON) to build gate dielectrics in transistors built
using next-generation process technologies. Since then, some
researchers have raised concerns about the long-term reliability of
a similar material known as hafnium dioxide, which is an element
with a high "k" value that is ideal for separating electrical
fields.
Texas Instruments compared the properties of hafnium dioxides
with HfSiON, and found HfSiON to be more electrically stable than
hafnium dioxide.
Transistors with 's high-k material consume much less power than
existing transistors with silicon dioxide gate dielectrics while
maintaining the mobility levels of silicon, said Ajit Shanware, a
member of Texas Instruments' technical staff. Mobility is a measure
of how fast current moves through a material.
Most chip companies use silicon dioxide as a gate dielectric in
chips built on 0.13-micron process technologies, and in their
next-generation chips built on 90 nanometer process technologies,
which will appear next year.
As the industry scales down to the 45 nanometer level, which is
forecast to take place around 2007, materials with higher
dielectric constants, or k-values, will be needed.
Chip designers had been drawn to hafnium-based materials because
of its high dielectric constant. But hafnium-based materials had
been thought to have much less mobility than silicon dioxide, which
would impede transistor performance, Shanware said. Designers were
also unsure about the proportions in which hafnium should be used
with other materials.
Texas Instruments' findings clear the way for the company to
implement the material on samples of its 65-nanometer process
technology, with full implementation coming on its 45-nanometer
technology, which is expected to roll out its 45-nanometer
technology in 2007.
Toshiba, among other companies, also intends to use HfSiON for
next-generation gate dielectrics. Intel recently announced its
plans to switch to an unspecified high-k material for its gate
dielectrics at the 45 nanometer level.
Tom Krazit writes for IDG News
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