Feature

IDE: past, present and future

The ubiquitous IDE interface has evolved over the years by incorporating new features and increasing throughput. Its successor, the new Enhanced IDE interface, has many hurdles to overcome

The PC industry is constantly searching for advanced technology. This equates to more disk space, faster performance, more memory, better displays - virtually every component is under relentless pressure to improve. Continual improvement for the disk drive industry means lower costs, improved reliability, higher capacity, and better performance. As PC performance increases, the performance of the hard drive, which is the central input/output (I/O) device of the PC, becomes increasingly important. Improvement in disk drive performance is a complex area and is measured using several variables: seek time, rotational latency, internal transfer rate, cache, and interface speed.

The hard drive interface is the path through which data travels between the PC and the hard drive. The original ISA-dependent ATA (IDE) interface was limited to about 4Mb/sec in the beginning, but reached as high as 8Mb/sec. Interface protocols, such as programmed input/output (PIO) and direct memory access (DMA) modes, were designed to take advantage of the new local bus architectures that replaced ISA. ATA interface modes have progressed from PIO to DMA and now Ultra DMA, giving data transfer rates from 8.3, 11.1, and 13.3Mb/sec up to 16.6, 33.3, and now 66.6 Mb/sec.

Ultra ATA/66 provides a low-cost, high-reliability, backwards-compatible solution to data transfer bottlenecks that slow overall system performance. As the data storage density (areal density) of disk drives and rotational speeds have increased, bottlenecks have also increased. With this has come a requirement for a better performance of the ATA interface to attain compatible data transfer speeds. Potentially, such improvements benefit PC end users by providing faster PCs - applications run faster, graphics run more smoothly, and multimedia flows uninterrupted on the screen. Actual performance benefits depend on the total system design and the applications being used. However, the drive performance trend is clear: performance demands on desktop and mobile disk drives will continue to push data transfer rates higher.

The original ATA interface is based on transistor-transistor logic (TTL) bus interface technology, which is in turn based on the old industry standard architecture (ISA) bus protocol. This protocol uses a data transfer method called asynchronous. Both data and command signals are sent along a signal pulse called a strobe, but the data and command signals are not interconnected. Only one type of signal (data or command) can be sent at a time, meaning a data request must be completed before a command or other type of signal can be sent along the same strobe.

Starting with ATA-2, a more efficient method of data transfer called synchronous is used. In synchronous mode, the drive controls the strobe and synchronises the data and command signals with the rising edge of each pulse. Synchronous data transfers interpret the rising edge of the strobe as a signal separator. Each pulse of the strobe can carry a data or command signal, allowing data and commands to be interspersed along the strobe. To get improved performance in this environment, it is logical to increase the strobe rate. A faster strobe means faster data transfer, but as the strobe rate increases, the system becomes increasingly sensitive to electro-magnetic interference (EMI, also known as signal interference or noise) which can cause data corruption and transfer errors.

ATA-4 includes Ultra ATA which, in an effort to avoid EMI, makes the most of existing strobe rates by using both the rising and falling edges of the strobe as signal separators. Thus twice as much data is transferred at the same strobe rate in the same time period. While ATA-2 and ATA-3 transfer data at burst rates up to 16.6 Mb/sec, Ultra ATA provides burst transfer rates up to 33.3Mb/sec. The ATA-4 specification adds Ultra DMA mode 2 (33.3Mb/sec) to the previous PIO modes 0-4 and traditional DMA modes 0-2.

ATA-5 includes Ultra ATA/66 which doubles the Ultra ATA burst transfer rate by reducing setup times and increasing the strobe rate. The faster strobe rate increases EMI, which cannot be eliminated by the standard 40-pin cable used by ATA and Ultra ATA. To eliminate this increase in EMI, a new 40-pin, 80-conductor cable has been developed. This cable adds 40 additional ground lines between each of the original 40 ground and signal lines. The additional 40 lines help shield the signal from EMI. The ATA-5 specification adds Ultra DMA modes 3 (44.4Mb/sec) and 4 (66.6Mb/sec) to the previous PIO modes 0-4, DMA modes 0-2, and Ultra DMA mode 2.

Just as Ultra ATA doubled previous transfer rates from 16.6 to 33.3 Mb/sec, Ultra ATA/66 potentially doubles the Ultra ATA burst transfer rate from 33.3 to 66.6Mb/sec. Because Ultra ATA/66 is attained using improved firmware and electronic features, the end user cost of an Ultra ATA/66 drive remains essentially the same as Ultra ATA drives. The user gets better performance for the same cost. Ultra ATA/66 is backward-compatible with existing Ultra ATA and all legacy ATA systems. The Ultra ATA/66 drive can be connected into a legacy system as easily as before. Cables will continue to support the traditional 40-pin ATA signal without change.

Ultra DMA Modes 0-4 introduced an error-detection mechanism known as cyclical redundancy checking (CRC). CRC is an algorithm that calculates an order and value sensitive checksum used to detect errors in a stream of data. Both the host (controller) and the drive calculate a CRC value for each Ultra DMA burst. After the host-requested data is sent, the drive calculates a CRC value and this is compared with the original host CRC value. If a difference is reported, the host may be required to select a slower transfer mode and reattempt the original request for data. (Note: CRC errors are detected and reported only when operating in an Ultra DMA transfer mode.)

Recently, a program referred to as Enhanced IDE was created with the intent to create a successor to the existing IDE interface. Enhanced IDE is a collection of four features designed to help meet the future needs of the market. Each of the four features does indeed support improved functionality at a system level; accordingly, these features are felt to be positive for the industry and for end users. As a package, however, Enhanced IDE is causing increased confusion in the industry while also raising the risks of incompatibility and mismatched system integration.

The four features of Enhanced IDE are high capacity addressing of ATA hard drives, fast data transfer rates for ATA hard drives, dual ATA host adapters and non-hard disc ATA peripherals. This collection of features requires an extremely high degree of integration. Specific support is required not only for storage peripherals but also for host adapters, core logic, system bus, BIOS and operating systems - virtually every major block of the PC architecture. Adding to this complexity is the fact that there is no central industry standard which controls these features.

Due to the lack of knowledge and the lack of a central industry standard specification, a serious problem has begun to surface. Suppliers are referring to their products as Enhanced IDE even though they do not support or provide all four features of Enhanced IDE. Users can today purchase "Enhanced IDE" host adapters that only provide one function such as high capacity addressing support. One can only imagine the potential for dissatisfaction when that user attempts to install the host adapter as a second channel on a secondary address only to find out that it does not support that feature of Enhanced IDE. Customers who expect to receive full Enhanced IDE support today are likely to receive partial support in seemingly random combinations from different vendors. Because the description "enhanced" is felt to be a legitimate adjective by suppliers, even for just one feature, it is nearly impossible to control the offerings of Enhanced IDE products and ensure consumers of complete support and satisfaction.

As previously stated, the individual features of Enhanced IDE do provide users with specific benefits. In recognition of this, almost every system manufacturer is beginning to phase in the use of selected features for their various system platforms as the market requires. Unfortunately for Enhanced IDE, the features are being introduced independently according to the whims of manufacturers in their tussle for market positioning.

The result of this independent introduction is, of course, that buyers of newer systems receive only the benefit of an individual feature. For example, fast data transfer rate support is becoming standard on high-end local bus systems. This single feature could very well satisfy the users immediate requirements without the need for the other features of Enhanced IDE. In the future, however, if the same system is upgraded to add the remaining features of Enhanced IDE, the user may be forced to purchase an Enhanced IDE package containing a feature that is already installed. This represents not only wasted features and unnecessary costs but also may result in integration conflicts and incompatibility with the original factory implementation.

To ensure safe passage in the rapidly advancing world of PC technology, users should look for the specific features, performance and functionality to meet their needs. For solutions that require a high degree of integration, all but the most knowledgeable technical users should call on the expertise of leading system manufacturers to assure compatibility and fulfillment of needs well into the future.

Compiled by Ajith Ram

ATA Solution I.S. Department 19/07/99 09:49

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This was first published in March 2000

 

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