Motorola has revealed a series of new microprocessor technologies
including two network security processors, the first audio chip
based on the company's 32-bit ColdFire architecture and new
microcode for integrated communication processors.
The company's new MCF5249 multiprocessor uses a version 2 ColdFire
core. It has 96Kbytes of on-chip memory and 8Kbytes of instruction
cache. Motorola's chip also has an enhanced multiply-accumulate
unit on the chip, providing digital signal processor functionality
for fast math and signal processing capability for audio and other
applications.
The MCF5249 burns 1.3 milliwatts per megahertz of processor speed.
Low-power processors tend to be used in devices with limited
battery power such as laptops and mobile phones.
Motorola also released two new security processors, the MPC184 and
MPC185. Routers, e-commerce servers and digital subscriber line
access multiplexers (DSLAMs) use security processors to offload the
processing burden for calculating encryption algorithms.
The MPC185 will support bi-directional bandwidth of OC-3 speeds,
about 400Mbps, and supports the Kasumi standard for 3G mobile
wireless data security systems. Support for OC-3 speeds permits
telecommunication carriers to handle existing data traffic loads
using fewer chips. Motorola priced the chips at $25 (£17) each in
quantities of 10,000.
The faster data speeds promised by 3G network operators won't
approach the speed of an OC-3 fibre-optic line for some time, said
David Berndt, a wireless mobility analyst with the Yankee Group in
Boston. The bandwidth capacity for the MPC185 will keep encryption
from becoming a bottleneck in wireless systems, he said.
The MPC184 chip is slower, supporting about 80M bps of bandwidth.
It processes encryption functions with the Wireless Encryption
Protocol (WEP) security standard. The MPC184 is $15 (£10.50) each
in quantities of 10,000.
Motorola also released four new sets of microcode for its
PowerQUICC II MPC825x and MPC826x integrated microprocessors.
Microcode is software written directly for the chip's onboard
memory.
New microcode for the enhanced ATM adaptation layer 2 will assist
3G base stations in multiplexing voice services over an ATM
network, allowing base stations to transfer more calls to existing
telecommunication infrastructure. The code adds support for up to
64,000 channels. It also improves statistics-gathering
capabilities, allowing carriers to gauge call volume coming through
individual base stations.
The Signalling System 7 (SS7) microcode package expands the chip's
ability to route the data associated with phone calls such as
caller ID or call-forwarding information through fibre-optic lines.
It supports high-speed SS7 channels up to T-1 and E-1 rates.
The MSP controller microcode package will permit phone and cable
companies to use Motorola chips to manage data traffic in DSLAM
access line cards and cable modem controller applications, like
serving video images on demand to customers.
Motorola's fast data switching microcode package allows processors
to automatically convert signals between ATM, Ethernet frames and
High-level Data Link Control (HDLC).