NEC prepares carbon nanotubes for faster circuits

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NEC prepares carbon nanotubes for faster circuits

NEC has developed a method of positioning tiny tubes of carbon that will make circuits run faster and consume less power than the fastest and most powerful silicon chips, 10 years from now.

The process is an important step toward NEC's goal of developing chips that run at 15GHz to 20GHz while consuming about the same power as today's Pentium 4 processors made by Intel.

The company said it made a breakthrough in the way it makes carbon nanotubes, bringing them closer to being used in transistors in LSI (large-scale integrated circuit) chips.

"Before we developed this process, we could not control the position or the diameter of carbon nanotubes simultaneously. Now we can," said Yukinori Ochiai, principal researcher at NEC's nanotechology group at the company's fundamental and environmental research laboratories.

"We think, frankly, it's a major step forward and a breakthrough... nobody else can do both position and diameter," he said.

Carbon nanotubes are made when carbon atoms form hollow, open-ended cylinders that have diameters between 0.4 nanometers and 1.8 nanometers. Carbon nanotubes vary in length up to several hundred nanometers long, depending on how they are made. A nanometer is one-billionth of a meter.

Ever since their discovery by NEC researcher Sumio Iijima in 1991, carbon nanotubes have held promise as the building blocks for transistors and circuit wiring that are much more efficient than those with conventional materials.

Electrons can flow through carbon nanotubes 10 times faster than they can in circuits made using silicon, and carbon nanotubes can carry 100 times the current and dissipate 20 times the heat of circuits made with silicon. Carbon nanotubes in transistors can also amplify about 20 times more current than conventional silicon-based transistors, Ochiai said. 

For example, Pentium 4 chips contain about 54 million transistors and these transistors are embedded in lines on the chip's silicon wafer that are 90 nanometers across. Next year, Intel will introduce chips built in 65 nanometer lines. The transistors have gates, the switches that turn off and on, measuring 35 nanometers across, according to Intel.

According to the International Technology Roadmap for Semiconductors, an organisation that helps standardise how companies advance chip technologies, processors will be built in lines as small as 22 nanometers by approximately 2016, and chips will contain billions of transistors.

As circuits get smaller, silicon's comparative lack of efficiency means chips have to use more power and generate more heat.

In addition, ever stronger yet thinner insulators are needed to stop electrons straying or leaking between the gate and other parts of the transistor. Placed in the circuits, as well as carrying more current faster, carbon nanotubes can also act as great insulators. Carbon nanotubes will solve many of the technical issues faced by transistors built on silicon alone, Ochiai said.

"With carbon nanotubes, the chips will run faster, but with the same power as today's chips," he said.

However, their size makes them difficult to manipulate, and unlike semiconductor technology, carbon nanotubes have not benefited from more than 50 years of technical development.

The process NEC announced solves the issues of size and position, because the company can grow carbon nanotubes to a standard diameter on a chip, and control their position to an accuracy of five nanometers, Ochiai said.

The company will use an electron beam to etch patterns into a film in the positions where it wants to anchor the tips of carbon nanotubes. Carbon atoms vaporised in ethanol gas are sucked over the anchor points, then condense into carbon nanotubes at those points, a process Ochiai said is like crystallising salt from sea water.

Ochiai's team are near to being able to control carbon nanotube direction using electric fields that wash over the carbon nanotubes as they are formed.

NEC believes that it can follow the history of semiconductor transistors and chips and cram more transistors into less space. If the company succeeds with its nanotube-direction strategy, it will be able to consider making transistors in groups of 10 then hundreds.

Paul Kallender writes for IDG News Service


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