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Mont-Blanc HPC project alpha tests Cavium ARM module

The consortium is working on building low-powered HPC based on 64-bit ARM chips

The Mont-Blanc European next-generation high-performance computing (HPC) project has become an alpha tester for Cavium’s ThunderX2 ARM server processor.

The system on a chip (SoC) technology from Cavium will be used to power the project’s HPC prototype.

Since October 2011, the aim of the project has been to design a new type of computer architecture for exascale-class computing.

The first phase of the project is aimed at exploring an energy-efficient alternative to current supercomputers, based on low-power mobile processors, with the ambition of setting future HPC standards for the exascale era.

The Mont-Blanc project is now in its third phase. The goals of this phase include working on the architecture of an exascale-class compute node based on the ARM architecture, and capable of being manufactured at industrial scale.

The project team will also assess the available options for maximum compute efficiency and develop the matching software ecosystem to pave the way for market acceptance of ARM-based systems, according to Mont-Blanc.

The new Mont-Blanc prototype will be built by Atos, the coordinator of phase three of the project. Through an agreement with Cavium, it will collaborate to develop the new Mont-Blanc platform.

According to the consortium, this platform will make use of the infrastructure of the Bull sequana pre-exascale supercomputer range for network, management, cooling and power, and will be used to assess options for maximum compute efficiency to further develop the software ecosystem for ARM HPC platforms, and to implement life-size tests.

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“ThunderX2 is a server-class chip designed for high-compute performance. With the adoption of this new generation of power – and performance-efficient processors, we are entering a new and exciting dimension of the Mont-Blanc project. This already gives us a glimpse of what a European exascale-class HPC platform could be in the near future,” said Etienne Walter, coordinator of phase three of the Mont-Blanc project.

The ThunderX2 product family is Cavium’s second-generation 64-bit ARMv8-A server processor SoC for HPC in the datacentre and cloud. 

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