Intel plans new chip architecture to underpin four-core processors


Intel plans new chip architecture to underpin four-core processors

Arif Mohamed
As the dual-core processor revolution rolls on, this week Intel is expected to detail plans of a new chip architecture to underpin forthcoming dual and four-core processors for desktops, notebooks and servers.

The new chip architecture, which will appear in 2006, will be Intel's first new architecture since NetBurst in 2000, which produced the Pentium 4. The announcement is expected to be the main news at the Intel Developer Forum (IDF), taking place this week.

The first chips based on the new platform will include Merom, a multi-core platform for mobile computers, and Conroe, a multi-core desktop platform. They are expected to host up to four cores on a single piece of silicon.

Intel is also expected to discuss new server virtualisation capabilities and forthcoming notebook power management features.

Earlier this year virtualisation software supplier VMware said it would be working with Intel to use the chip-based virtualisation features in Intel's server and desktop processors. Intel's virtualisation technology was formerly codenamed Vanderpool Technology.

On the notebook side, further details are expected of Intel's next generation Centrino mobile platform, codenamed Napa, which Intel discussed at its March IDF. The first product to ship under Napa is Intel's 65-nanometer dual-core Pentium M processor codenamed Yonah.

Intel is also working with hardware suppliers to increase notebook battery power to eight hours by 2008 - a significant boost on today's typical four hours.

Meanwhile, Intel rival AMD has launched its low-end Athlon 64 processor earlier this month. The AMD Athlon 64 X2 dual-core processor 3800+ has been designed to provide an entry point to dual-core computing on desktop PCs.

Previous products in AMD's Athlon 64 dual-core range had been targeted at professional users and the digital media market. On the server side, IBM has started to sell blade servers based on AMD's dual-core 64-bit Opteron processors.

Itanium 2 goes dual-core

Intel's next-generation 64-bit Itanium processor, codenamed Montecito, will feature dual-processing cores, and is due to arrive at the end of 2005.

The dual-core Montecito Itaniums will be the first chips to have Vanderpool virtualisation features, as well as Pellston error correction technology, Foxton technology, which boosts the clock speed on the Itanium chip as the workload demands it, and DBS power management features.

The Madison chips will run at speeds of 1.66GHz, with cache sizes of 9Mbytes and 6Mbytes, and are expected to be used by mainframe suppliers such as Hitachi, Fujitsu and Silicon Graphics.

In July, Intel released the last batch of single-core Itanium processors, and is to release two new Itanium 2 processors from the 64-bit Madison family.

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