IBM leads server race with launch of Numa-Q

The race to build multi-processor Windows servers heated up last week with IBM's announcment of its 64 processor Intel-based...

The race to build multi-processor Windows servers heated up last week with IBM's announcment of its 64 processor Intel-based server, writes Caroline Davis.

Based on Numa (non-uniform memory architecture) technology from Sequent, which IBM acquired last November, the new Numa-Q E410 competes with Unisys' ES7000. Both servers will run Windows 2000 Datacenter, which is expected by September this year.

The E410 runs a variant of Unix, but not, as yet, Windows. "There are still some scalability challenges we need to overcome," says David Burgess, IBM's product manager for Web servers. "But it should run Linux and Windows 2000 Datacenter by the beginning of 2001."

"Windows will give the servers broader appeal," says Burgess. High-end multi-processor servers are currently used mainly in telecommunications and financial companies.

But Burgess sees an increasing demand from the growing use of business intelligence and customer relationship management systems where operators need to access data while the customer is waiting on the phone.

The Numa-Q E410 uses Intel's latest Pentium III Xeon processors, which Burgess says improve performance up to twofold.

IBM is also planning a server based on Intel's forthcoming Itanium processors for a 16-way Numa-Q to support 64-bit Windows 2000 Datacenter.

The Numa-Q will form the basis for IBM's "flexible server" strategy. "By the end of 2001, we will have 64-way servers and above, with support for NT, Unix and Linux concurrently," says Burgess.

By using terminal services - the multi-user feature in Windows 2000 - the Flexible Server could be rolled out to run a front-end NT application such as Office 2000 or the Oracle Application NT-based client and a back-end server application.

The Numa-Q series servers are built from blocks of four processors linked by a piece of hardware called an IQ Link. This lets different blocks see each other as if it was a single processor bus, as in SMP.

IBM says that using this processor configuration, CPUs can run ten times faster.

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