Be prepared for the terabyte era, says Intel

The semiconductor industry will have to rethink many of the architectural approaches it has taken to build today's processors to...

The semiconductor industry will have to rethink many of the architectural approaches it has taken to build today's processors to handle the vast datasets of the future, said Pat Gelsinger, senior vice president and chief technology officer at Intel.

Gelsinger traditionally takes the last day of the Spring Intel Developer Forum to tell attendees about Intel's plans for new technologies and products in the next five to 10 years.

In previous years, he has talked up everything from software-defined radios to biosensor networks, but this year he focused on Intel's fundamental role as a chip architect.

"We're at the tip of the iceberg in terms of the digitisation of information," Gelsinger said, adding that as more and more information is recorded digitally, processors will need to handle terabytes of data and deliver tera bits per second of bandwidth. One terabyte is equal to one trillion bytes.

To handle that much data, computers will need to adapt, search through large amounts of data for relevant information and reach a conclusion based on the whole process, Gelsinger said. Performance will increase through shrinking transistors and other innovations, but an architectural change is necessary to handle the tera era.

It's not just processing power that needs to increase in order to reach those goals, Gelsinger said, stressing that memory, interconnects and storage will all need to scale alongside processing power to realise this vision of the future.

One way Intel is working to enable the tera era is through the use of architectural techniques such as helper threads, which increase the performance of single-threaded applications by executing as many tasks as possible in parallel on a single processor.

This technique becomes even more effective as multicore processors roll out, Gelsinger said. Multicore processors integrate more than one central processing unit onto a single chip.

Another method is the use of software-defined radios to allow users to switch quickly between wireless connections to communicate as effectively as possible, Gelsinger said.

Tom Krazit  writes for IDG News Service

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