Photonics - Professor Frederic Gardes: The route to scalable, error-free silicon photonics
This is a guest post for the Computer Weekly Developer Network written by professor Frederic Gardes, co-Investigator at Cornerstone and head of the Integrated Photonics Group at the Optoelectronic Research Centre (ORC) at the University of Southampton.
Gardes writes in full as follows…
For silicon photonics to be deployable across modern AI and data centre infrastructure at the scale of tens of thousands of identical nodes, it needs to behave like a standard mass-produced chip. However, integrating a laser or amplifier onto a silicon photonics chip currently requires die bonding or micro transfer printing (MTP), which means fabricating the component on separate wafers, cutting what you need, and manually transferring it across to the silicon.
Doing this once can work well, but when repeated hundreds of times across a chip with each component having its own laser or amplifier, the accumulated misalignment errors can cause significant yield issues. This makes the process less reliable. For silicon photonics to meet the scale required by modern AI infrastructure, it must demonstrate high yield and high density of integration at wafer scale, minimising packaging overhead and optimising alignment to overcome these challenges.
Getting this right is critical to the success of silicon photonics strategies. We know that light can move data faster than electrons, but the challenge is to make these systems ‘boring’ enough for high-volume deployment in AI infrastructure without massive recalibration overhead. The key to this is monolithic integration.
Monolithic integration
Monolithic integration eliminates the costly alignment steps and variability that come from piecing together separate components. For example, monolithic integration relies on the alignment accuracy of high-capability Complementary Metal Oxide Semiconductor (CMOS) processes, which is at the nanometer scale, compared with the half-micron errors seen in manual assembly. Current materials like Gallium Arsenide are increasingly subject to export restrictions, which creates supply chain risk.
With monolithic epitaxy, a semiconductor manufacturing approach in which a single-crystal layer is grown directly onto a crystalline substrate, you deposit just a few microns of material rather than relying on an entire native wafer. This can be achieved using techniques such as molecular beam epitaxy (MBE) or metal–organic chemical vapour deposition (MOCVD), both of which enable highly controlled growth. By using only the material you need, this approach helps reduce costs and ease some of the supply and scalability constraints associated with bulk substrates.
Designers work from a process design kit (PDK) and receive a finished chip in which all the components function as intended, reducing both cost and time to market. This capability is now being developed at the Optoelectronics Research Centre (ORC), in partnership with University College London, University of Cambridge and Cardiff University through the UKRI-funded QUDOS programme. The programme focuses on growing III–V semiconductor layers directly on silicon across full production wafers, paving the way for scalable manufacturing of integrated photonic devices.
PCM & UV trimming: The ‘non-volatile’ firmware
No fabrication process is perfect. Chips come out with slight variation, affecting their overall perfomance. Phase Change Materials (PCM) and UV trimming act as a kind of physical-layer firmware, correcting those imperfections post-fabrication so that optical links perform consistently enough for software APIs to rely on them.
Traditionally, devices are tuned using tiny heaters, but this approach has drawbacks: heat can spread to nearby components (causing interference) and it consumes a significant amount of energy, making it inefficient. Unlike the light-absorbing materials used in technologies like 1990s DVDs, newer materials, like some modern PCMs, can be transparent to infrared light. This means they can be switched between states using short energy pulses without relying on continuous light absorption. These materials are also “non-volatile”: once their state is changed, they remain in that state without needing any additional power. This makes them far more energy-efficient for applications where stability over time is important.
In practice, this could reduce the need for continuous power, as switches may be able to operate intermittently or even draw on locally harvested energy. The ORC is exploring this concept in a European project called Octopus, in collaboration with Orange. Historically, the cycling endurance of PCMs has been a limitation, but additional recent work from the ORC team (currently being prepared for publication) suggests significant improvements, with devices reaching over 100 million switching cycles under test conditions.
Meanwhile, UV trimming is a technique that allows engineers to fine-tune a material’s refractive index in very small, precise regions by exposing it to ultraviolet light. In practice, this makes it possible to adjust and realign entire optical systems directly on the wafer, compensating for tiny variations introduced during fabrication that are extremely difficult to eliminate. Furthermore, such advances could enable applications like optical lookup tables (programmable with ultraviolet light) that process large streams of data in real time. For example, they could help detect security threats or identify patterns within ultra-high-speed data streams without having to convert the whole optical data stream back into the electrical domain, improving speed and efficiency.
Error-free architecture: A commercial requirement
In next-generation data centres, computing, memory and storage are increasingly separated and connected by high-speed networks, a model known as disaggregation. In such systems, optical (photonic) links are essential. But if these links need constant recalibration, they consume extra energy and reduce overall efficiency. Achieving near error-free operation is therefore critical: it determines whether a technology can be deployed at the massive scale used by hyperscale data centres.
At ORC, researchers have demonstrated a key advance: a semiconductor optical amplifier (SOA) integrated natively on silicon and coupled directly to a waveguide. This shows that it is possible to overcome long-standing challenges such as signal loss. In practical terms, it means silicon photonic chips could generate and amplify optical signals directly on chip, without relying on external components. Earlier work, including research at Ghent University, University of California, Santa Barbara and Chinese Academy of Sciences, had integrated similar materials onto silicon, but performance was limited by waveguide coupling losses or reflections that prevented fully functional amplifiers. This new result suggests that those barriers can be addressed.
Gardes: The target, as I see it, is a 100x improvement in the energy efficiency of large data centre operations.
Such advances open the door to fully integrated photonic systems in which signals can be generated, processed and amplified directly on a silicon chip. Monolithically integrated SOAs could compensate for losses across complex optical circuits, enabling larger and more scalable photonic processors and interconnects. In data centres, this could translate into more efficient optical links that maintain signal strength without relying on external components, reducing energy consumption and system complexity.
More broadly, on-chip amplification could support applications ranging from high-speed communications to real-time optical signal processing, helping photonic technologies move closer to practical, large-scale deployment. While timelines depend on funding and industrial adoption, researchers aim to bring these technologies to wafer-scale production within the next five years.
What developers care about
Developers, in practice, don’t care about underlying photonics. What matters to them is transparency: hardware that delivers more computing power at lower cost, without requiring any changes to how they work. That’s the real brief.
Scalable, error-free silicon photonics will work within the existing stack. Developers won’t need new programming models or new architectures. That’s what those of us working in the field are trying to deliver; resources that use silicon photonics to reduce costs and widen access, starting with the power demands of AI data centres, which have risen sharply as GPU clusters have scaled.
The target, as I see it, is a 100x improvement in the energy efficiency of large data centre operations, not by redesigning the stack developers work with, but by making the hardware underneath it substantially cheaper to run.
The real challenge is proving that silicon photonics can work reliably, repeatedly and at scale. Monolithic integration, combined with wafer-level correction techniques, helps accelerate adoption by simplifying manufacturing. In the process, photonics stop being a niche solution and become invisible infrastructure: just another layer of compute that developers never have to think about. It vanishes from view and quietly rewrites the rules.
