I was speaking to Micron earlier. This company is developing DDR2 memory based on a 78-nanometer fabrication process. Now what's interesting here is that by reducing the size of the transistors, thanks to the 78-nanometer process, the chip actually consumes less power. This means Micron has been able to reduce voltage down to 1.5v from 1.8v.
Now the problem is that the fabrication process allows manufacturers to squeeze even more transistors in the same space. More transistors mean more power. Basically, the power savings are eradicated.
It’s a bit of cat and mouse. But as Micron points out a 2 Gbyte DDR memory chip will actually consume less power than two 1 Gbyte DDR chips. Still, I say, we should aim to write more efficient code - that way we can both speed up application performance and realise the power saving benefits of this type of new technology.
