Intel has unveiled new processor technology that will enable a
single processor to emulate faster two-processor systems.
Paul Otellini, the executive vice-president and general manager of
the Intel Architecture Group, unveiled the hyper-threading
technology during his keynote speech at the company's Intel
Developer Forum. Hyper-threading, also known as Simultaneous
Multi-Threading (SMT), allows a single processor to act as two
processors, increasing performance in the process.
"We've seen performance gains of as much as 20% to 30%," said Abhi
Talwalkar, the vice-president and assistant general manager of
Intel's Enterprise Platforms Group. In addition, Intel is
developing tools to take advantage of the technology, he
said.
The first systems using Intel's hyper-threading technology will be
Xeon-based and will appear next year.
Intel also provided details of its 64-bit processor roadmap. The
next processor in Intel's Itanium 64-bit family, code-named
McKinley, is expected next year.
"It's going through verification and validation in the labs right
now," Talwalkar said. "And we will see significant performance
gains as McKinley comes forward on platforms."
McKinley will boast several advances over Itanium, including an
increased bus speed from 133MHz on the current processor to 200MHz.
The bus frequency is the speed of data passing between the
processor and the system's memory. Code compiled for Itanium will
run between 150% and 200% faster on McKinley, Talwalkar said. The
difference will be even greater if applications are re-compiled to
run on McKinley.
After McKinley will come Madison, due in 2003, Talwalkar said.
"Madison is taking McKinley and moving it to 0.13 micron, enabling
us to have a larger memory cache. While Itanium has a 4Mbyte cache,
Madison is expected to have up to 6M bytes of on-die cache.
Intel also expects another processor, code-named Deerfield, to be
available from 2003. Deerfield will be targeted at the 1U
(1.75-inch) and 2U server market.